This means that you need to install a SystemVerilog simulator or compiler, such as ModelSim or Verilator, in order to use these features in your code. Once you have installed a suitable tool, you should be able to generate a VCD file using $dumpfile and $dumpvars. Be sure to verify that your simulator or compiler supports these commands, and consult its documentation for guidance on using them correctly.
Asked: 2023-07-19 05:43:13 +0000
Seen: 16 times
Last updated: Jul 19 '23